2009 U1 Q2 Part C

Part i

The instruction Set is the set of machine code instructions that a CPU is designed to understand/process

The Instruction format is  the layout convention chosen to represent instruction types and their corresponding operands for a given instruction set.

Part ii


Part iii

OPCODEOperand 1Operand 2

We could reserve 4 bits for the opcode which will facilitate a total of 24  or 16 instructions.

The remaining 12 bits can be  split, using 6 bits for operand 1 an 6 bits for operand 2 .

Part iv

Recall: Direct addressing means that the address of the operand is stored in the instruction

Fetch –

  • Copy instruction from memory , which is specified by the PC,  to the  CIR (Current Instruction Register).
  • increment the PC (Program Counter)

Decode –

  • Determine operands and operation.
    •  Since Direct addressing is used, the MAR will store the address of the operand which was decoded and copied from the CIR.
    • The Data from Memory stored at the location specified by the MAR is copied to the MDR (Memory Data Register)

Execute –

  • Control is passed to the appropriate logic circuit based on the operation opcode. and the results of the operation on the data stored in the MDR, is stored in the AC (accumulator)

© 2021  Vedesh Kungebeharry. All rights reserved. 

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