A latch is a small circuit that can remember one bit. In this lesson you will build the simplest one, the SR latch, from two NOR gates, test it, break it, and then build it again from NAND gates. Every section has a Try it box so you can work the circuit yourself, on a computer or on your phone.

Background reading: this lesson sits alongside two earlier posts. Flip Flops gives the definitions of combinational and sequential circuits and the Stallings reading, and The SR Flip-Flop – Practical Introduction walks through the class demonstration step by step, with a timing diagram.

Why do we need memory?

Every gate you have met so far is combinational: its output depends only on its inputs right now. If you take your finger off the input, the output goes back. You saw this in Truth Tables – An application of abstraction to physical circuits and Logic Gates – Formal Introduction: one row of the truth table for each set of inputs, and nothing else matters.

A computer needs more than that. It has to keep a value after the input has gone: the number you typed, the next instruction to run, the result of a sum. A circuit whose output depends on its inputs and on what it was doing before is called a sequential circuit. The trick that makes it work is feedback: the output of a gate is wired back into the input of another gate.

Build it: two cross-coupled NOR gates

Recall the NOR gate. Its output is 1 only when both inputs are 0. One useful way to remember it: any 1 into a NOR gate forces its output to 0.

Now take two NOR gates, G1 and G2, and cross-couple them: the output of each one goes into an input of the other. That leaves one free input on each gate. These are the latch inputs, S (Set) and R (Reset). The outputs are Q and Q (read “Q-bar”, sometimes written Q’), which should always be opposites.

• G1 has inputs R and Q. Its output is Q, so Q = NOR(R, Q).
• G2 has inputs S and Q. Its output is Q, so Q = NOR(S, Q).

Notice that R goes into the gate that makes Q. That looks back-to-front at first, but it makes sense: R = 1 forces that gate to output 0, and Reset means Q = 0.

The simulator below is the one from The SR Flip-Flop – Practical Introduction. It writes Q as Q’ (Q-prime), which means the same thing. Use the switches (or tap the S and R circles), try Step by step mode to watch one gate at a time, and follow the guided tour of the class scenarios.

Things to try in the box above:

1. Make S = 1, then put it back to 0. Q stays 1 even though S is back to 0. That is memory.
2. Now make R = 1, then put it back to 0. Q stays 0.
3. With S = 0 and R = 0, the latch can be showing Q = 0 or Q = 1. The inputs are the same, so the only thing deciding the output is what happened before.

Predict, then test

Here is the full behaviour of the NOR latch. "Q (next)" means the value of Q after the gates have settled.

Do not just learn the table. Work out each row from the NOR rule. In the box below you are given a stored value and a pair of inputs. Make a prediction first, then check it.

Hint: start with whichever gate has a 1 on its external input. That gate must output 0. Then use that 0 to work out the other gate.

The forbidden state: S = 1 and R = 1

What happens when S = 1 and R = 1? Each gate has a 1 on its input, so both gates output 0: Q = 0 and Q = 0. That breaks the rule that Q is the opposite of Q, which is the first problem.

The second problem is worse. Suppose S and R both go back to 0 at exactly the same moment:

1. Each gate now sees 0 and 0, so both try to output 1.
2. Then each gate sees a 1 coming back from the other, so both try to output 0.
3. The outputs can flicker like this, and the latch settles only when one gate happens to be a little faster than the other. This is called a race condition.
4. Which gate wins depends on tiny differences in the real components, so the final value of Q cannot be predicted.

If the two inputs are let go one at a time, the result is predictable: whichever input is still 1 at the end wins. That is why designers simply say S = 1, R = 1 is not allowed for an SR latch. Try it 1 lets you release both together. The lab below lets you compare all three ways of letting go, and keeps count:

The NAND version (active-low inputs)

You can also build a latch from two NAND gates. The NAND rule is the mirror image of the NOR rule: any 0 into a NAND gate forces its output to 1. So in a NAND latch it is a 0 on an input that does the work. We say the inputs are active-low, and we write them with a bar: S and R.

• G1 has inputs S and Q. Its output is Q, so Q = NAND(S, Q).
• G2 has inputs R and Q. Its output is Q, so Q = NAND(R, Q).

Compare this with the NOR latch. The resting inputs are now 1 and 1, not 0 and 0. The forbidden inputs are 0 and 0, and they make both outputs 1 (not 0). Also, the Set input goes into the gate that makes Q, which is the opposite of the NOR latch.

The simulator below works just like Try it 1, but with NAND gates. It writes the inputs as S’ and R’ (S-bar and R-bar). First choose the wiring, then test whether your Set input really sets.

Where it leads

The SR latch is the starting point for nearly every memory circuit in a computer. These are the ideas that come next in this course (posts to follow):

• Gated latches and the D (Data) flip-flop. An extra input, usually a clock or enable signal, decides when the latch is allowed to change. The D flip-flop also has a single data input D, so S and R can never both be 1 and the forbidden state cannot happen.
• The JK flip-flop. It is built so that the input combination J = 1, K = 1 is useful instead of forbidden: the output toggles (changes to the opposite value).
• Registers. A register is a group of flip-flops, one for each bit, that store a binary word together. An 8-bit register uses 8 flip-flops.
• Counters. Flip-flops connected in a chain can count. See The Ripple Counter Explained (Animation), which uses clocked JK flip-flops.
• Memory. Thousands or millions of 1-bit storage cells arranged in rows and columns give you memory that the processor can read and write.

The same idea in C: a variable holds a value

When you write C programs you use the same idea all the time. A variable keeps its value until your program changes it, just as a latch keeps Q until S or R changes it. (If you have not met variables in C yet, see Variables and Format Specifiers: Printing Values with %d and Adding 2 numbers – Declaring integer variables, Watching Variables.)

#include <stdio.h>

int main()
{
    int q = 0;          /* like a latch that starts reset   */

    q = 1;              /* like a pulse on S: set q to 1    */
                        /* nothing else changes q here...   */

    printf("%d\n", q);  /* ...so it still prints 1 (hold)   */
    return 0;
}

The comparison is only a picture to help you remember. The C language does not tell you what kind of circuit stores q. What you can say is that each bit of a stored value has to be kept by some storage element, and a latch is the simplest example of one.

Review questions

Now try these in your notebook before you open the answers.

Self-check: S = 1, R = 1 and the NAND wiring

Homework

1. Explain, using the NOR truth table, what happens for each output of the SR latch when S = 1 and R = 1. Then explain what can happen when both inputs return to 0.
2. Draw an SR latch using NAND gates. Label the inputs (active-low) and both outputs, and write its truth table underneath.

The half adder (circuit and truth table) has its own lesson later in this course.

Exam tips

• Specimen Unit 1 Paper 01 (2021), Item 11. A multiple-choice item about what flip-flops are and what they are used for (syllabus reference 1.3, Module 1). It tests whether you know that a flip-flop is bistable and stores one bit, and how flip-flops are used inside the CPU. When an item asks which statements are true, judge each statement on its own first: one false statement rules out every option that contains it. Open the specimen paper and try the item before you check the answer key.
• 2013 Unit 1 Paper 02, Question 1(a)(iii). This part is about the characteristics of a flip-flop. It tests whether you can say, in a few short sentences, how a flip-flop behaves and what it is used for. Give each characteristic as its own sentence (two stable states, keeps its state so it stores a bit) and add a use, such as memory or counters. Try the question yourself first, then compare with the solution on this site: 2013 U1 Q1.
• 2009 Unit 1 Paper 02, Question 1. This question has no latch part, but it brings together gate truth tables, building one gate from others, a multiplexer and binary numbers in one long question. It shows that the building blocks are examined together, so you need the gate truth tables you use to explain a latch at your fingertips. Try it, then check the solution on this site: 2009 U1 Q1.
• More worked answers are on the CS Solutions page.

General advice for latch questions (from the lesson content, not from a particular paper): always give both outputs, Q and Q; say which input combination is forbidden and why; for a NAND latch say clearly that the inputs are active-low; and label every wire on a diagram.

Previous: Logic Gates – Formal Introduction. Background: Flip Flops and The SR Flip-Flop – Practical Introduction. Next: D and JK flip-flops (coming soon in this course).

Syllabus link: CAPE Computer Science (CXC A19/U2/21), Unit 1, Module 1: Computer Architecture. Specific Objective 2: describe the basic building blocks of a computer (flip flops: Data, JK and SR; registers; counters). Specific Objective 3: interpret the interaction among the basic building blocks of a computer (Data flip flops, registers).

Updates

7 Nov 2026: Added the shared course badge summary and lesson mastery quiz, with feedback, retries and browser-saved progress.

26 Oct 2026

- Draft created.

27 Oct 2026

- Reused the original SR flip-flop simulator for the Try-it circuits.

28 Oct 2026

- Exam references reworded and quiz questions rewritten.

© 2026 Vedesh Kungebeharry. All rights reserved.